1. Field of the Invention
The present invention relates to an electronic circuit breaker of a power supply, and more particularly to an electronic circuit breaker of a power supply having dual output ports to avoid generation of high-frequency large current oscillation and protect against circuit damage.
2. Description of the Related Art
Power supplies serve to convert AC power from AC mains into DC power and supply the DC power to various electric appliances. One type of power supplies is equipped with two DC voltage output terminals through which power is supplied simultaneously. To prevent such power supplies from burning out due to overload or short circuit occurring at one of the DC voltage output terminals, each output terminal further has an electronic circuit breaker serially connected therewith.
With reference to FIGS. 5 and 6, a conventional power supply having two output ports includes a power factor correction (PFC) device 81, a DC power conversion circuit 82, an output capacitor 83, two reverse voltage prevention units 84 and an electronic circuit breaker 90.
The PFC device 81 converts the AC power from AC mains into DC power. The DC power is further converted by the DC power conversion unit 82 and then outputted through the output capacitor 83.
Each reverse voltage prevention unit 84 has a FET (Field effect transistor) Q32 or Q33 and controls the FET Q32 or Q33 to turn on or off after detecting voltage of an input terminal and an output terminal of the reverse voltage prevention unit 84 so as to prevent the voltage of the output terminal of the reverse voltage prevention unit 84 from being greater than that of the input terminal and damaging the pre-stage circuit by a resulting reverse current.
The electronic circuit breaker 90 serves to open the circuit when detecting that current outputted by each output port is excessively large and further protect the pre-stage circuits and has an input port 901 and two output ports 902, 903. The input port 901 is connected with an output terminal of the DC power conversion circuit 82. The output ports 902, 903 are respectively connected to the two reverse voltage prevention units 84 and serve as output terminals of the power supply having dual output ports. One end of the output capacitor 83 is grounded and the other end is connected to the input port 901.
The electronic circuit breaker 90 further has two FETs Q28, Q29, two current detection circuits 91, 92 and a digital controller 93.
The drain and source of each FET Q28 or Q29 are respectively connected between the output capacitor 83 and one of the reverse voltage prevention units 84, and the gate is connected to a DC bias circuit Vc1 or Vc2.
The current detection circuits 91, 92 are respectively and serially connected between the FETs Q28, Q29 and the output capacitor 83. Each current detection circuit 91 or 92 has a current detection resistor Rs1 or Rs2 and a signal conversion unit 911 or 921.
The digital controller 93 is connected to the signal conversion unit 911, 921 and the FET Q28, Q29 of each current detection circuit 91, 92 and has a critical current value stored therein so as to acquire output current values of the signal conversion unit 911, 921 of each current detection circuit 91, 92, compare the output current values with the critical current value, control each DC bias circuits Vc1, Vc2 to supply a bias voltage to the gate of each FET Q28, Q29 and turn on or off the FET Q28, Q29. As to the digital controller 93 using an open collector, the digital controller 93 can turn on or turn off a corresponding DC bias circuit Vc1 or Vc2 by turning on or off the open collector.
The input port 901 of the electronic circuit breaker 90 is connected to the output ports 902, 903 through the FETs Q28, Q29 and the current detection circuit 91, 92. Based on the characteristics of a FET, an on state between the drain and source of the FET is determined by the bias VGD between the base and the drain of the FET. Given an N-type FET as an example, when the bias VGD between the base and the drain is greater than zero, the state between the drain and the source is on. When the bias VGD between the base and the drain is not greater than zero, the state between the drain and the source is off. Therefore, when no short circuit occurs, the digital controller 93 controls each DC bias circuit Vc1, Vc2 to supply a forward bias to a corresponding FET Q28 or Q29 so that the state between the source and the drain of the FET Q28 or Q29 is on, and the input port 901 is connected with each output port 902, 903. When a short circuit occurs in a post-stage circuit connected to one of the output ports 902, the current of the output port 902 abruptly rises. Meanwhile, the voltage drop value across the current detection resistor Rs1 also relatively rises. The digital controller 93 detects that the current of the output port 902 exceeds the critical current value through the signal conversion unit 911, and further gets the corresponding DC bias circuit Vc1 grounded so that the gate of the corresponding FET Q28 is grounded and has a zero voltage. Thus, the state between the source and the drain is off, and the input port 901 is disconnected from the output ports 902 to prevent the excessively large current from burning out the pre-stage circuit connected to the input port 901.
Disconnecting the input port 901 from the output ports 902 makes the pre-stage circuit temporarily immune to the impact of the short circuit and also lowers the output current after the disconnection. The current detection circuit 91 keeps detecting the current value of the output ports 902 and reporting the current value to the digital controller 93. Once the digital controller 91 determines that the current value is less than the critical current value, the digital controller 93 controls its open collector to disconnect from the DC bias circuit Vc1 so that the gate of the FET Q28 returns to the status of high voltage and the state between the source and the drain is back on again. If the short circuit is still present at the output ports 902, the current value of the current detection circuit 91 surely exceeds the critical current value again. With reference to FIG. 7, as the FET Q28 keeps turning on and off, the current value between the input port 901 and the output port 902 continuously oscillates above and below the critical current value. When a short circuit stays on, such oscillation causes high-frequency large current with high-frequency oscillation to damage the circuit.
Furthermore, as the two current detection circuits 91, 92 are connected to the same input port 901 and commonly share the output capacitor 83, when a high-frequency large current is generated between the input port 901 and one of the output ports 902, the voltage outputted by the other output port 903 is unstable. With such unstable phenomenon the power supply having dual output ports fails to pass the requirements of relevant safety regulations, and the electronic circuit breaker 90 needs to be tackled with a solution.